ASIC Performance Architect, Silicon

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 3 years of experience with embedded system software development, test and debug, analyzing workloads on real systems or devices.
  
• Experience in hardware performance monitors or profiling, and profiling or tracing tools in Android such as perfetto, ftrace or simpleperf.
  

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience with CPU, GPU, Display subsystem, Camera, Modem, cache system, memory management unit or memory system architecture.
  
• Knowledge of one or more of these areas: bandwidth and latency analysis, scheduler, DVFS governor, power analysis, thermal management, device driver, OpenCL, OpenGL, Gaming analysis.
  

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Perform performance, power, thermal analysis results in both qualitative and quantitative fashion.
  
• Study the behavior and develop characterization of a variety of workloads on devices for Hardware/Software co-optimization.
  
• Participate in both evaluations of future ASIC architecture and software optimization.
  
• Design experiments, and collect silicon data base on use cases for next generation memory system architecture decisions.