AI/ML Hardware Engineer for Neuromorphic Computing (DE)

Keywords: AI inference, RISC-V customization, Digital design, Neuromorphic Accelerator.

They say, “Designing microprocessors is hard, expensive, and takes years.” But does it have to? We say, “No.”

Codasip was founded on a simple belief – we could bring together the brilliance of microprocessor architects and software engineers and capture it in tools that made design simpler, faster, and less expensive. The company was founded in 2014 with the mission of democratizing processor design. Nowadays Codasip is a leading supplier of processing solutions for IC designers, offering products based on open standards such as the RISC-V ISA, LLVM, and UVM.

• Department: Labs
• Employment: Full-time
• Experience level: Mid-Senior (Ph.D. or MSc with 5y+ of industrial experience)
• Location: Germany (preferably in Munich, remote). Our office in Munich is located not far from the city center (Theresienwiese), well connected by public transport, e.g. Munich Central Station is right around the corner
• Daily cooperation and reporting: Pavel Zaykov, our Lead Innovation & Research Engineer

WHY WE ARE HIRING:

We are looking for an experienced AI/ML HW Engineer to join our innovation team at Codasip Labs. Once you join the company you will work on the Neurokit2e project which is part of the EU Horizon Europe framework. Our goal in the Neurokit2e project is to design a RISC-V-based Application Specific Accelerator for Neuromorphic Computing.

YOUR MAIN RESPONSIBILITIES:

• Innovate, develop, integrate, and evaluate state-of-the-art (micro-)architectural IP cores in Codasip Studio (primarily written in Codasip Studio’s processor description language, CodAL) for the next generation of Neuromorphic accelerators based on the RISC-V architecture.
• Customize existing Codasip RISC-V IP cores to satisfy partners'/ customers' requirements.
• Develop middle-ware SW (compatible with Spiking Neural Networks) for fast adoption of the newly proposed extensions.
• Lead Codasip contribution to project deliverables and collaborate with academic and industrial partners on joint proof-of-concept demos.
• Collaborate with internal and external stakeholders.
• Write scientific papers, and report technical results at international conferences, and project review meetings.

Requirements

YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:

• Over 5 years of recent and relevant experience.
• Strong background in Computer architecture and embedded systems.
• CodAL programming knowledge is not required but experience in HLS (e.g., C++/Matlab/SystemC) is needed.
• Experience with VHDL/Verilog, and FPGA deployment.
• SW skills: C/ C++/ Assembly, HLS, and scripting languages (bash, Python).
• Fluent written and spoken English and German are essential.
• Experience with customer-facing activities and European co-funded projects is appreciated.
• Strong analytical and problem-solving skills, thinking outside of the box.
• Excellent communication skills, pragmatic, proactive, self-motivated, team player.

Benefits

SOME USEFUL LINKS ON CODASIP:

• Codasip RISC V Processor Solutions
• Design for differentiation: architecture licenses in RISC‑V
• Scaling is Failing - Dr. Ron Black, CEO, Codasip
• Codasip Labs to accelerate advanced technologies

We're passionate about RISC-V processors and are in tune with the times! If you are, apply now :)